BZEIH, FATIMA
BZEIH, FATIMA
100026 - Dipartimento di Ingegneria navale, elettrica, elettronica e delle telecomunicazioni
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Architecture and FPGA Implementation of Digital Time-to-Digital Converter for Sensing Applications
2025-01-01 Hijazi, Zeinab; Bzeih, Fatima; Ibrahim, Ali
Low Power Design of Approximate Adders Based on Inexact Full Adder
2025-01-01 Ibrahim, Ali; Bzeih, Fatima; Srour, Oussama; Hijazi, Zeinab; Aiello, Orazio
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| Architecture and FPGA Implementation of Digital Time-to-Digital Converter for Sensing Applications | 1-gen-2025 | Hijazi, Zeinab; Bzeih, Fatima; Ibrahim, Ali | |
| Low Power Design of Approximate Adders Based on Inexact Full Adder | 1-gen-2025 | Ibrahim, Ali; Bzeih, Fatima; Srour, Oussama; Hijazi, Zeinab; Aiello, Orazio |