A 0.3V, 2.34nW and 56db Gain Bulk-Driven OTA Exploiting Cascode Output Stages and Enhanced Current Mirrors

This paper introduces an Ultra-Low Voltage (ULV) OTA topology combining a bulk-driven fully-differential input stage with local common-mode feedback (CMFB), a differential to single-ended converter based on an improved current mirror whose accuracy is boosted thanks to a ULV error amplifier, and a cascode output stage with optimal bias settings for proper operation with a 0.3V supply voltage. The proposed topology allows to accurately set the bias current in each circuit branch, thus guaranteeing a robust biasing despite PVT variations. The ULV OTA has been designed in the 180nm CMOS technology from TSMC, and can achieve a voltage gain as high as 56 dB with a power consumption lower than 2.35 nW. Results of parametric and Monte Carlo simulations have confirmed the strong resilience of the proposed OTA to PVT variations. Its capability to operate at a supply voltage of 0.3V with the above mentioned specs makes the proposed OTA ideal for analog applications in IoT systems and biomedical devices.